(1) Field of the Invention
The present invention relates to a semiconductor memory device. More particularly, it relates to a metal-insulator semiconductor (MIS) dynamic memory device in which a plurality of sense amplifiers in a sense amplifier group are selected by a single decoder circuit, and, consequently, the number of decoder circuits is decreased and the degree of integration of the semiconductor memory device is increased.
(2) Description of the Prior Art
To increase the degree of integration of a semiconductor memory device, it is necessary to effectively use the chip area of the integrated circuit of the semiconductor memory device. In an attempt to do this, a recent MIS dynamic memory device adopts a system in which two sense amplifiers are selected by one decoder circuit instead of using a system in which one decoder circuit selects one sense amplifier.
However, even in such a memory device using a system in which two sense amplifiers are selected by a single decoder circuit, the area occupied by the decoder circuits on the semiconductor substrate becomes relatively large when the memory capacity is large, thereby making it difficult to further increase the degree of integration of the semiconductor memory device.